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ADC/DAC-Free Analog Acceleration of Deep Neural Networks with Frequency Transformation
Moreover, our novel array micro-architecture enables adaptive stitching of cells column-wise and row-wise, thereby facilitating perfect parallelism in computations.
Towards Model-Size Agnostic, Compute-Free, Memorization-based Inference of Deep Learning
Specifically, our work capitalizes on the inference mechanism of the recurrent attention model (RAM), where only a small window of input domain (glimpse) is processed in a one time step, and the outputs from multiple glimpses are combined through a hidden vector to determine the overall classification output of the problem.
Memory-Immersed Collaborative Digitization for Area-Efficient Compute-in-Memory Deep Learning
We discuss various networking configurations among CiM arrays where Flash, SA, and their hybrid digitization steps can be efficiently implemented using the proposed memory-immersed scheme.
