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ADC/DAC-Free Analog Acceleration of Deep Neural Networks with Frequency Transformation
Moreover, our novel array micro-architecture enables adaptive stitching of cells column-wise and row-wise, thereby facilitating perfect parallelism in computations.
Memory-Immersed Collaborative Digitization for Area-Efficient Compute-in-Memory Deep Learning
We discuss various networking configurations among CiM arrays where Flash, SA, and their hybrid digitization steps can be efficiently implemented using the proposed memory-immersed scheme.
MC-CIM: Compute-in-Memory with Monte-Carlo Dropouts for Bayesian Edge Intelligence
Using Bayesian inference, not only the prediction itself, but the prediction confidence can also be extracted for planning risk-aware actions.
ENOS: Energy-Aware Network Operator Search for Hybrid Digital and Compute-in-Memory DNN Accelerators
Our proposed ENOS framework allows an optimal layer-wise integration of inference operators and computing modes to achieve the desired balance of energy and accuracy.
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