FPGA-Based Hardware Accelerator of Homomorphic Encryption for Efficient Federated Learning

no code implementations • 21 Jul 2020 • Zhaoxiong Yang, Shuihai Hu, Kai Chen

Our framework implements the representative Paillier homomorphic cryptosystem with high level synthesis for flexibility and portability, with careful optimization on the modular multiplication operation in terms of processing clock cycle, resource usage and clock frequency.

Federated Learning Privacy Preserving