HLSDataset: Open-Source Dataset for ML-Assisted FPGA Design using High Level Synthesis

1 code implementation • 17 Feb 2023 • Zhigang Wei, Aman Arora, Ruihao Li, Lizy K. John

Machine Learning (ML) has been widely adopted in design exploration using high level synthesis (HLS) to give a better and faster performance, and resource and power estimation at very early stages for FPGA-based design.

Weightless Neural Networks for Efficient Edge Inference

no code implementations • 3 Mar 2022 • Zachary Susskind, Aman Arora, Igor Dantas Dos Santos Miranda, Luis Armando Quintanilla Villon, Rafael Fontella Katopodis, Leandro Santiago de Araujo, Diego Leonel Cadette Dutra, Priscila Machado Vieira Lima, Felipe Maia Galvao Franca, Mauricio Breternitz Jr., Lizy K. John

We then demonstrate the viability of the BTHOWeN architecture by presenting an FPGA-based accelerator, and compare its latency and resource usage against similarly accurate quantized DNN accelerators, including Multi-Layer Perceptron (MLP) and convolutional models.

Edge-computing