no code implementations • 23 Aug 2023 • Yonghe Zhang, Liwei Ni, Jiaxi Zhang, Guojie Luo, Huawei Li, Shenggen Zheng
NPN classification has many applications in the synthesis and verification of digital circuits.
no code implementations • 11 Nov 2021 • Jiaxi Zhang, Liwei Ni, Shenggen Zheng, Hao liu, Xiangfu Zou, Feng Wang, Guojie Luo
In this paper, we introduce Boolean sensitivity into Boolean matching and design several sensitivity-related signatures to enhance fast Boolean matching.
no code implementations • 13 Apr 2021 • Zhe Zhou, Bizhao Shi, Zhe Zhang, Yijin Guan, Guangyu Sun, Guojie Luo
At the hardware design level, we propose a pipelined CirCore architecture, which supports efficient block-circulant matrices computation.