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Found 8 papers, 4 papers with code
PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC
This paper tackles the challenges of implementing few-shot learning on embedded systems, specifically FPGA SoCs, a vital approach for adapting to diverse classification tasks, especially when the costs of data acquisition or labeling prove to be prohibitively high.
Federated learning compression designed for lightweight communications
Federated Learning (FL) is a promising distributed method for edge-level machine learning, particularly for privacysensitive applications such as those in military and medical domains, where client data cannot be shared or transferred to a cloud computing server.
Energy Consumption Analysis of pruned Semantic Segmentation Networks on an Embedded GPU
Deep neural networks are the state of the art in many computer vision tasks.
Leveraging Structured Pruning of Convolutional Neural Networks
Structured pruning is a popular method to reduce the cost of convolutional neural networks, that are the state of the art in many computer vision tasks.
Rethinking Weight Decay For Efficient Neural Network Pruning
Introduced in the late 1980s for generalization purposes, pruning has now become a staple for compressing deep neural networks.
Efficient Hardware Implementation of Incremental Learning and Inference on Chip
In this paper, we tackle the problem of incrementally learning a classifier, one example at a time, directly on chip.
Quantized Guided Pruning for Efficient Hardware Implementations of Convolutional Neural Networks
Convolutional Neural Networks (CNNs) are state-of-the-art in numerous computer vision tasks such as object classification and detection.
Transfer Incremental Learning using Data Augmentation
Deep learning-based methods have reached state of the art performances, relying on large quantity of available data and computational power.
