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Found 27 papers, 4 papers with code
View Dialogue in 2D: A Two-stream Model in Time-speaker Perspective for Dialogue Summarization and beyond
To better capture the dialogue information, we propose a 2D view of dialogue based on a time-speaker perspective, where the time and speaker streams of dialogue can be obtained as strengthened input.
An FPGA-Based Reconfigurable Accelerator for Convolution-Transformer Hybrid EfficientViT
Vision Transformers (ViTs) have achieved significant success in computer vision.
An FPGA-Based Accelerator Enabling Efficient Support for CNNs with Arbitrary Kernel Sizes
Particularly, it demonstrates efficient support for large-kernel CNNs, achieving throughputs of 169. 68 GOPS and 244. 55 GOPS for RepLKNet-31 and PyConvResNet-50, respectively, both of which are implemented on hardware for the first time.
BETA: Binarized Energy-Efficient Transformer Accelerator at the Edge
Existing binary Transformers are promising in edge deployment due to their compact model size, low computational complexity, and considerable inference accuracy.
A Computationally Efficient Neural Video Compression Accelerator Based on a Sparse CNN-Transformer Hybrid Network
Video compression is widely used in digital television, surveillance systems, and virtual reality.
Efficient N:M Sparse DNN Training Using Algorithm, Architecture, and Dataflow Co-Design
At the algorithm level, a bidirectional weight pruning method, dubbed BDWP, is proposed to leverage the N:M sparsity of weights during both forward and backward passes of DNN training, which can significantly reduce the computational cost while maintaining model accuracy.
A Precision-Scalable RISC-V DNN Processor with On-Device Learning Capability at the Extreme Edge
However, many edge devices struggle to boost inference throughput of various quantized DNNs due to the varying quantization levels, and these devices lack floating-point (FP) support for on-device learning, which prevents them from improving model accuracy while ensuring data privacy.
S2R: Exploring a Double-Win Transformer-Based Framework for Ideal and Blind Super-Resolution
In this paper, we propose a double-win framework for ideal and blind SR task, named S2R, including a light-weight transformer-based SR model (S2R transformer) and a novel coarse-to-fine training strategy, which can achieve excellent visual results on both ideal and random fuzzy conditions.
Fast and Accurate FSA System Using ELBERT: An Efficient and Lightweight BERT
Based on ELBERT, an innovative method to accelerate text processing on the GPU platform is developed, solving the difficult problem of making the early exit mechanism work more effectively with a large input batch size.
ViTALiTy: Unifying Low-rank and Sparse Approximation for Vision Transformer Acceleration with a Linear Taylor Attention
Unlike sparsity-based Transformer accelerators for NLP, ViTALiTy unifies both low-rank and sparse components of the attention in ViTs.
An Efficient FPGA-based Accelerator for Deep Forest
In this paper, an efficient hardware accelerator is proposed for deep forest models, which is also the first work to implement Deep Forest on FPGA.
BEBERT: Efficient and Robust Binary Ensemble BERT
Pre-trained BERT models have achieved impressive accuracy on natural language processing (NLP) tasks.
NASA: Neural Architecture Search and Acceleration for Hardware Inspired Hybrid Networks
Multiplication is arguably the most cost-dominant operation in modern deep neural networks (DNNs), limiting their achievable efficiency and thus more extensive deployment in resource-constrained applications.
Accelerate Three-Dimensional Generative Adversarial Networks Using Fast Algorithm
3D deconvolution (DeConv), as an important computation of 3D-GAN, significantly increases computational complexity compared with 2D DeConv.
An Efficient FPGA Accelerator for Point Cloud
The submanifold sparse convolutional network (SSCN) has been widely used for the point cloud due to its unique advantages in terms of visual results.
An Algorithm-Hardware Co-Optimized Framework for Accelerating N:M Sparse Transformers
(1) From algorithm perspective, we propose a sparsity inheritance mechanism along with an inherited dynamic pruning (IDP) method to obtain a series of N:M sparse candidate Transformers rapidly.
GANDSE: Generative Adversarial Network based Design Space Exploration for Neural Network Accelerator Design
To improve the design quality while saving the cost, design automation for neural network accelerators was proposed, where design space exploration algorithms are used to automatically search the optimized accelerator design within a design space.
Learning Robust and Lightweight Model through Separable Structured Transformations
Learning deep models with both lightweight and robustness is necessary for these equipments.
Memory-Efficient CNN Accelerator Based on Interlayer Feature Map Compression
To maintain real-time processing in embedded systems, large on-chip memory is required to buffer the interlayer feature maps.
Elbert: Fast Albert with Confidence-Window Based Early Exit
Despite the great success in Natural Language Processing (NLP) area, large pre-trained language models like BERT are not well-suited for resource-constrained or real-time applications owing to the large number of parameters and slow inference speed.
Transform-Based Feature Map Compression for CNN Inference
To achieve higher accuracy in machine learning tasks, very deep convolutional neural networks (CNNs) are designed recently.
Hardware Accelerator for Multi-Head Attention and Position-Wise Feed-Forward in the Transformer
Designing hardware accelerators for deep neural networks (DNNs) has been much desired.
Training Deep Neural Networks Using Posit Number System
With the increasing size of Deep Neural Network (DNN) models, the high memory space requirements and computational complexity have become an obstacle for efficient DNN implementations.
Design Light-weight 3D Convolutional Networks for Video Recognition Temporal Residual, Fully Separable Block, and Fast Algorithm
Deep 3-dimensional (3D) Convolutional Network (ConvNet) has shown promising performance on video recognition tasks because of its powerful spatio-temporal information fusion ability.
A Hardware-Oriented and Memory-Efficient Method for CTC Decoding
Firstly, we improve the beam search decoding algorithm to save the storage space.
Automatic Speech Recognition
Automatic Speech Recognition (ASR)
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SGAD: Soft-Guided Adaptively-Dropped Neural Network
Based on the developed guideline and adaptive dropping mechanism, an innovative soft-guided adaptively-dropped (SGAD) neural network is proposed in this paper.
Intra-layer Nonuniform Quantization for Deep Convolutional Neural Network
In this paper, an equal distance nonuniform quantization (ENQ) scheme and a K-means clustering nonuniform quantization (KNQ) scheme are proposed to reduce the required memory storage when low complexity hardware or software implementations are considered.
