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Found 10 papers, 2 papers with code
MATADOR: Automated System-on-Chip Tsetlin Machine Design Generation for Edge Applications
System-on-Chip Field-Programmable Gate Arrays (SoC-FPGAs) offer significant throughput gains for machine learning (ML) edge inference applications via the design of co-processor accelerator systems.
Contracting Tsetlin Machine with Absorbing Automata
In brief, the TA of each clause literal has both an absorbing Exclude- and an absorbing Include state, making the learning scheme absorbing instead of ergodic.
An FPGA Architecture for Online Learning using the Tsetlin Machine
We present use cases for online learning using the proposed infrastructure and demonstrate the energy/performance/accuracy trade-offs.
IMBUE: In-Memory Boolean-to-CUrrent Inference ArchitecturE for Tsetlin Machines
Non-volatile memory devices such as Resistive RAM (ReRAM) offer integrated switching and storage capabilities showing promising performance for ML applications.
Energy-frugal and Interpretable AI Hardware Design using Learning Automata
Our analyses provides the first insights into conflicting design tradeoffs involved in energy-efficient and interpretable decision models for this new artificial intelligence hardware architecture.
Self-timed Reinforcement Learning using Tsetlin Machine
We present a hardware design for the learning datapath of the Tsetlin machine algorithm, along with a latency analysis of the inference datapath.
QoS-Aware Power Minimization of Distributed Many-Core Servers using Transfer Q-Learning
Then, it is coupled with vertical scaling using transfer Q-learning, which further tunes power/performance based on workload profile using dynamic voltage/frequency scaling (DVFS).
Low-Latency Asynchronous Logic Design for Inference at the Edge
Average latency of the proposed circuit is reduced by 10x compared with the synchronous implementation whilst maintaining similar area.
A Novel Multi-Step Finite-State Automaton for Arbitrarily Deterministic Tsetlin Machine Learning
However, TMs rely heavily on energy-costly random number generation to stochastically guide a team of Tsetlin Automata to a Nash Equilibrium of the TM game.
Neural Network Design for Energy-Autonomous AI Applications using Temporal Encoding
We design a PWM-based perceptron which can serve as the fundamental building block for NNs, by using an entirely new method of realising arithmetic in the PWM domain.
