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Found 7 papers, 1 papers with code
GNN4REL: Graph Neural Networks for Predicting Circuit Reliability Degradation
Without a precise understanding of the impact of variations on the delay of circuit paths, guardbands, which keep timing violations at bay, cannot be correctly estimated.
Modeling and Predicting Transistor Aging under Workload Dependency using Machine Learning
The pivotal issue of reliability is one of colossal concern for circuit designers.
Brain-Inspired Hyperdimensional Computing: How Thermal-Friendly for Edge Computing?
Although HDC operations are simple, the vectors are large, resulting in a high number of CPU operations and thus a heavy load on the entire system potentially causing temperature violations.
Positive/Negative Approximate Multipliers for DNN Accelerators
In addition, we propose a filter-oriented approximation method to map the weights to the appropriate modes of the approximate multiplier.
Reliability-Aware Quantization for Anti-Aging NPUs
Transistor aging is one of the major concerns that challenges designers in advanced technologies.
Control Variate Approximation for DNN Accelerators
In this work, we introduce a control variate approximation technique for low error approximate Deep Neural Network (DNN) accelerators.
Hardware Trojan Detection Using Controlled Circuit Aging
Combining IC aging with over-clocking produces a pattern of bit errors at the IC output by the induced timing violations.
