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Found 7 papers, 3 papers with code
ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuning
Oracle-less machine learning (ML) attacks have broken various logic locking schemes.
Graph Neural Networks: A Powerful and Versatile Tool for Advancing Design, Reliability, and Security of ICs
Graph neural networks (GNNs) have pushed the state-of-the-art (SOTA) for performance in learning and predicting on large-scale data present in social networks, biology, etc.
Security Closure of IC Layouts Against Hardware Trojans
In this work, we proactively and systematically harden the physical layouts of ICs against post-design insertion of Trojans.
GNN4REL: Graph Neural Networks for Predicting Circuit Reliability Degradation
Without a precise understanding of the impact of variations on the delay of circuit paths, guardbands, which keep timing violations at bay, cannot be correctly estimated.
NeuroUnlock: Unlocking the Architecture of Obfuscated Deep Neural Networks
We release the NeuroUnlock and the ReDLock as open-source frameworks.
Attacking Split Manufacturing from a Deep Learning Perspective
The notion of integrated circuit split manufacturing which delegates the front-end-of-line (FEOL) and back-end-of-line (BEOL) parts to different foundries, is to prevent overproduction, piracy of the intellectual property (IP), or targeted insertion of hardware Trojans by adversaries in the FEOL facility.
Obfuscating the Interconnects: Low-Cost and Resilient Full-Chip Layout Camouflaging
Our scheme is based on obfuscating the interconnects (BEOL); it can be readily applied to any design without modifications in the device layer (FEOL).
Cryptography and Security
