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Found 12 papers, 1 papers with code
EasyACIM: An End-to-End Automated Analog CIM with Synthesizable Architecture and Agile Design Space Exploration
Leveraging the multi-objective genetic algorithm (MOGA)-based design space explorer, EasyACIM can obtain high-quality ACIM solutions based on the proposed synthesizable architecture, targeting versatile application scenarios.
PDNNet: PDN-Aware GNN-CNN Heterogeneous Network for Dynamic IR Drop Prediction
We are the first work to apply graph structure to deep-learning based dynamic IR drop prediction method.
ProPD: Dynamic Token Tree Pruning and Generation for LLM Parallel Decoding
Additionally, it introduces a dynamic token tree generation algorithm to balance the computation and parallelism of the verification phase in real-time and maximize the overall efficiency across different batch sizes, sequence lengths, and tasks, etc.
ASCEND: Accurate yet Efficient End-to-End Stochastic Computing Acceleration of Vision Transformer
To overcome the compatibility challenges, ASCEND proposes a novel deterministic SC block for GELU and leverages an SC-friendly iterative approximate algorithm to design an accurate and efficient softmax circuit.
HEQuant: Marrying Homomorphic Encryption and Quantization for Communication-Efficient Private Inference
Compared with prior-art HE-based protocols, e. g., CrypTFlow2, Cheetah, Iron, etc, HEQuant achieves $3. 5\sim 23. 4\times$ communication reduction and $3. 0\sim 9. 3\times$ latency reduction.
Memory-aware Scheduling for Complex Wired Networks with Iterative Graph Optimization
Memory-aware network scheduling is becoming increasingly important for deep neural network (DNN) inference on resource-constrained devices.
Falcon: Accelerating Homomorphically Encrypted Convolutions for Efficient Private Mobile Network Inference
Efficient networks, e. g., MobileNetV2, EfficientNet, etc, achieves state-of-the-art (SOTA) accuracy with lightweight computation.
HybridNet: Dual-Branch Fusion of Geometrical and Topological Views for VLSI Congestion Prediction
Accurate early congestion prediction can prevent unpleasant surprises at the routing stage, playing a crucial character in assisting designers to iterate faster in VLSI design cycles.
EBSR: Enhanced Binary Neural Network for Image Super-Resolution
While the performance of deep convolutional neural networks for image super-resolution (SR) has improved significantly, the rapid increase of memory and computation requirements hinders their deployment on resource-constrained devices.
MPCViT: Searching for Accurate and Efficient MPC-Friendly Vision Transformer with Heterogeneous Attention
Secure multi-party computation (MPC) enables computation directly on encrypted data and protects both data and model privacy in deep learning inference.
CircuitNet: An Open-Source Dataset for Machine Learning Applications in Electronic Design Automation (EDA)
The electronic design automation (EDA) community has been actively exploring machine learning (ML) for very large-scale integrated computer-aided design (VLSI CAD).
DaSGD: Squeezing SGD Parallelization Performance in Distributed Training Using Delayed Averaging
The state-of-the-art deep learning algorithms rely on distributed training systems to tackle the increasing sizes of models and training data sets.
