Towards Programmable Memory Controller for Tensor Decomposition

no code implementations • 17 Jul 2022 • Sasindu Wijeratne, Ta-Yang Wang, Rajgopal Kannan, Viktor Prasanna

Implementing accelerators on Field Programmable Gate Array (FPGA) for kernels such as MTTKRP is attractive due to the energy efficiency and the inherent parallelism of FPGA.

Tensor Decomposition