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Physical Mechanism behind the Hysteresis-free Negative Capacitance Effect in Metal-Ferroelectric-Insulator-Metal Capacitors with Dielectric Leakage and Interfacial Trapped Charges
By introducing the dielectric (DE) leakage and interfacial trapped charges, our simulations of the hysteresis loops are in a strong agreement with the experimental measurements, suggesting the existence of an interfacial oxide layer at the FE-metal interface in metal-ferroelectric-metal (MFM) capacitors.
Applied Physics
A mixed signal architecture for convolutional neural networks
Deep neural network (DNN) accelerators with improved energy and delay are desirable for meeting the requirements of hardware targeted for IoT and edge computing systems.
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