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Found 17 papers, 1 papers with code
Realtime Facial Expression Recognition: Neuromorphic Hardware vs. Edge AI Accelerators
The paper focuses on real-time facial expression recognition (FER) systems as an important component in various real-world applications such as social robotics.
Facial Expression Recognition
Facial Expression Recognition (FER)
Facial Expression Recognition at the Edge: CPU vs GPU vs VPU vs TPU
Facial Expression Recognition (FER) plays an important role in human-computer interactions and is used in a wide range of applications.
Facial Expression Recognition
Facial Expression Recognition (FER)
A Novel Stochastic LSTM Model Inspired by Quantum Machine Learning
Works in quantum machine learning (QML) over the past few years indicate that QML algorithms can function just as well as their classical counterparts, and even outperform them in some cases.
Heterogeneous Integration of In-Memory Analog Computing Architectures with Tensor Processing Units
To leverage the strengths of TPUs for convolutional layers and IMAC circuits for dense layers, we propose a unified learning algorithm that incorporates mixed-precision training techniques to mitigate potential accuracy drops when deploying models on the TPU-IMAC architecture.
IMAC-Sim: A Circuit-level Simulator For In-Memory Analog Computing Architectures
Thus, in this paper, we develop IMAC-Sim, a circuit-level simulator for the design space exploration of IMAC architectures.
Energy-Efficient Deployment of Machine Learning Workloads on Neuromorphic Hardware
In recent years, several edge deep learning hardware accelerators have been released that specifically focus on reducing the power and area consumed by deep neural networks (DNNs).
Reliability-Aware Deployment of DNNs on In-Memory Analog Computing Architectures
Conventional in-memory computing (IMC) architectures consist of analog memristive crossbars to accelerate matrix-vector multiplication (MVM), and digital functional units to realize nonlinear vector (NLV) operations in deep neural networks (DNNs).
Static Hand Gesture Recognition for American Sign Language using Neuromorphic Hardware
The best DNN model achieves an accuracy of 99. 93% on the ASL Alphabet dataset, whereas the best performing SNN model has an accuracy of 99. 30%.
MRAM-based Analog Sigmoid Function for In-memory Computing
We propose an analog implementation of the transcendental activation function leveraging two spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and a CMOS inverter.
Interconnect Parasitics and Partitioning in Fully-Analog In-Memory Computing Architectures
Fully-analog in-memory computing (IMC) architectures that implement both matrix-vector multiplication and non-linear vector operations within the same memory array have shown promising performance benefits over conventional IMC systems due to the removal of energy-hungry signal conversion units.
An Adaptive Sampling and Edge Detection Approach for Encoding Static Images for Spiking Neural Networks
Herein, we propose a method for encoding static images into temporal spike trains using edge detection and an adaptive signal sampling method for use in SNNs.
An In-Memory Analog Computing Co-Processor for Energy-Efficient CNN Inference on Mobile Devices
In this paper, we develop an in-memory analog computing (IMAC) architecture realizing both synaptic behavior and activation functions within non-volatile memory arrays.
A Single-Cycle MLP Classifier Using Analog MRAM-based Neurons and Synapses
In this paper, spin-orbit torque (SOT) magnetoresistive random-access memory (MRAM) devices are leveraged to realize sigmoidal neurons and binarized synapses for a single-cycle analog in-memory computing (IMC) architecture.
TSV Extrusion Morphology Classification Using Deep Convolutional Neural Networks
Results obtained show that the CNN model with optimized complexity, dropout, and data augmentation can achieve a classification accuracy comparable to that of a human expert.
SOT-MRAM based Sigmoidal Neuron for Neuromorphic Architectures
In this paper, the intrinsic physical characteristics of spin-orbit torque (SOT) magnetoresistive random-access memory (MRAM) devices are leveraged to realize sigmoidal neurons in neuromorphic architectures.
SNRA: A Spintronic Neuromorphic Reconfigurable Array for In-Circuit Training and Evaluation of Deep Belief Networks
In this paper, a spintronic neuromorphic reconfigurable Array (SNRA) is developed to fuse together power-efficient probabilistic and in-field programmable deterministic computing during both training and evaluation phases of restricted Boltzmann machines (RBMs).
Composable Probabilistic Inference Networks Using MRAM-based Stochastic Neurons
Magnetoresistive random access memory (MRAM) technologies with thermally unstable nanomagnets are leveraged to develop an intrinsic stochastic neuron as a building block for restricted Boltzmann machines (RBMs) to form deep belief networks (DBNs).
