Search Results for author:
Found 8 papers, 2 papers with code
DG-RePlAce: A Dataflow-Driven GPU-Accelerated Analytical Global Placement Framework for Machine Learning Accelerators
Global placement is a fundamental step in VLSI physical design.
NN-Steiner: A Mixed Neural-algorithmic Approach for the Rectilinear Steiner Minimum Tree Problem
On the methodology front, we propose NN-Steiner, which is a novel mixed neural-algorithmic framework for computing RSMTs that leverages the celebrated PTAS algorithmic framework of Arora to solve this problem (and other geometric optimization problems).
An Open-Source ML-Based Full-Stack Optimization Framework for Machine Learning Accelerators
Parameterizable machine learning (ML) accelerators are the product of recent breakthroughs in ML.
Performance Analysis of DNN Inference/Training with Convolution and non-Convolution Operations
The modeling effort of SimDIT comprehensively covers convolution and non-convolution operations of both CNN inference and training on a highly parameterizable hardware substrate.
A Machine Learning Approach to Improving Timing Consistency between Global Route and Detailed Route
Inaccurate timing prediction wastes design effort, hurts circuit performance, and may lead to design failure.
K-SpecPart: Supervised embedding algorithms and cut overlay for improved hypergraph partitioning
State-of-the-art hypergraph partitioners follow the multilevel paradigm that constructs multiple levels of progressively coarser hypergraphs that are used to drive cut refinement on each level of the hierarchy.
Hier-RTLMP: A Hierarchical Automatic Macro Placer for Large-scale Complex IP Blocks
In a typical RTL to GDSII flow, floorplanning or macro placement is a critical step in achieving decent quality of results (QoR).
Assessment of Reinforcement Learning for Macro Placement
We provide open, transparent implementation and assessment of Google Brain's deep reinforcement learning approach to macro placement and its Circuit Training (CT) implementation in GitHub.
