no code implementations • 9 Feb 2024 • Ruiyang Qin, Yuting Hu, Zheyu Yan, JinJun Xiong, Ahmed Abbasi, Yiyu Shi
Neural Architecture Search (NAS) has become the de fecto tools in the industry in automating the design of deep neural networks for various applications, especially those driven by mobile and edge devices with limited computing resources.
no code implementations • 11 Dec 2023 • Zheyu Yan, Xiaobo Sharon Hu, Yiyu Shi
In this study, we define the problem of pinpointing the worst-case performance of CiM DNN accelerators affected by device variations.
no code implementations • 11 Dec 2023 • Zheyu Yan, Xiaobo Sharon Hu, Yiyu Shi
In our research, we illustrate that only a small fraction of weights need this write-verify treatment for the corresponding devices and the DNN accuracy can be preserved, yielding a notable programming acceleration.
1 code implementation • 17 Nov 2023 • Pietro Melzi, Ruben Tolosana, Ruben Vera-Rodriguez, Minchul Kim, Christian Rathgeb, Xiaoming Liu, Ivan DeAndres-Tame, Aythami Morales, Julian Fierrez, Javier Ortega-Garcia, Weisong Zhao, Xiangyu Zhu, Zheyu Yan, Xiao-Yu Zhang, Jinlin Wu, Zhen Lei, Suvidha Tripathi, Mahak Kothari, Md Haider Zama, Debayan Deb, Bernardo Biesseck, Pedro Vidal, Roger Granada, Guilherme Fickel, Gustavo Führ, David Menotti, Alexander Unnervik, Anjith George, Christophe Ecabert, Hatef Otroshi Shahreza, Parsa Rahimi, Sébastien Marcel, Ioannis Sarridis, Christos Koutlis, Georgia Baltsou, Symeon Papadopoulos, Christos Diou, Nicolò Di Domenico, Guido Borghi, Lorenzo Pellegrini, Enrique Mas-Candela, Ángela Sánchez-Pérez, Andrea Atzori, Fadi Boutros, Naser Damer, Gianni Fenu, Mirko Marras
Despite the widespread adoption of face recognition technology around the world, and its remarkable performance on current benchmarks, there are still several challenges that must be covered in more detail.
no code implementations • 29 Jul 2023 • Zheyu Yan, Yifan Qin, Wujie Wen, Xiaobo Sharon Hu, Yiyu Shi
In this work, we propose to use the k-th percentile performance (KPP) to capture the realistic worst-case performance of DNN models executing on CiM accelerators.
no code implementations • 12 Jun 2023 • Zheyu Yan, Yifan Qin, Xiaobo Sharon Hu, Yiyu Shi
In this study, we present a novel approach that leverages Large Language Models (LLMs) to address this issue.
1 code implementation • 23 May 2023 • Yifan Qin, Zheyu Yan, Wujie Wen, Xiaobo Sharon Hu, Yiyu Shi
However, the stochastic nature and intrinsic variations of NVM devices often result in performance degradation in DNN inference.
no code implementations • 15 Jul 2022 • Zheyu Yan, Xiaobo Sharon Hu, Yiyu Shi
In this work, we formulate the problem of determining the worst-case performance of CiM DNN accelerators under the impact of device variations.
1 code implementation • 25 Mar 2022 • Bingqian Lu, Zheyu Yan, Yiyu Shi, Shaolei Ren
We first perform neural architecture search to obtain a small set of optimal architectures for one accelerator candidate.
1 code implementation • 17 Feb 2022 • Zheyu Yan, Xiaobo Sharon Hu, Yiyu Shi
In this work, we show that it is only necessary to select a small portion of the weights for write-verify to maintain the DNN accuracy, thus achieving significant speedup.
no code implementations • 13 Sep 2021 • Zheyu Yan, Weiwen Jiang, Xiaobo Sharon Hu, Yiyu Shi
To the best of the authors' knowledge, this is the first DNAS framework that can handle large search spaces with bounded memory usage.
no code implementations • 6 Jul 2021 • Zheyu Yan, Da-Cheng Juan, Xiaobo Sharon Hu, Yiyu Shi
Emerging device-based Computing-in-memory (CiM) has been proved to be a promising candidate for high-energy efficiency deep neural network (DNN) computations.
no code implementations • 10 Feb 2020 • Lei Yang, Zheyu Yan, Meng Li, Hyoukjun Kwon, Liangzhen Lai, Tushar Krishna, Vikas Chandra, Weiwen Jiang, Yiyu Shi
Neural Architecture Search (NAS) has demonstrated its power on various AI accelerating platforms such as Field Programmable Gate Arrays (FPGAs) and Graphic Processing Units (GPUs).
no code implementations • 31 Oct 2019 • Weiwen Jiang, Qiuwen Lou, Zheyu Yan, Lei Yang, Jingtong Hu, Xiaobo Sharon Hu, Yiyu Shi
In this paper, we are the first to bring the computing-in-memory architecture, which can easily transcend the memory wall, to interplay with the neural architecture search, aiming to find the most efficient neural architectures with high network accuracy and maximized hardware efficiency.
1 code implementation • 10 Sep 2019 • Zheyu Yan, Yiyu Shi, Wang Liao, Masanori Hashimoto, Xichuan Zhou, Cheng Zhuo
We are then able to analytically explore the weakness of a network and summarize the key findings for the impact of SIPP on different types of bits in a floating point parameter, layer-wise robustness within the same network and impact of network depth.